31static volatile uint32_t *iic_ptrs[
NUM_IICS] = {
35#define IIC_REG_SOFT_RESET (0x40 / 4)
43 }
else if (iic ==
IIC1) {
59 const uint8_t reg, uint8_t *data, uint16_t data_length) {
66 return (ByteCount == data_length) ? 0 : 1;
70 const uint8_t reg, uint8_t *data,
71 uint16_t data_length) {
75 uint8_t buffer[1 + data_length];
77 memcpy(&(buffer[1]), data, data_length);
78 uint8_t ByteCount =
XIic_Send((UINTPTR)iic_ptrs[iic], addr, &(buffer[0]),
80 return (ByteCount == (data_length + 1)) ? 0 : 1;
void arm_shared_close(arm_shared *handle)
void * arm_shared_init(arm_shared *handle, const uint32_t address, const uint32_t length)
iic_index_t
Enum of IICs. Functions use a switch numbered from 0..NUM_IICS-1.
void iic_destroy(const iic_index_t iic)
Close the shared memory handle for the specified IIC index.
bool iic_write_register(const iic_index_t iic, const uint8_t addr, const uint8_t reg, uint8_t *data, uint16_t data_length)
bool iic_read_register(const iic_index_t iic, const uint8_t addr, const uint8_t reg, uint8_t *data, uint16_t data_length)
void iic_init(const iic_index_t iic)
Initialize the IIC specified by the index with a shared memory handle and a buffer size of 4096 bytes...
#define IIC_REG_SOFT_RESET
unsigned XIic_Recv(UINTPTR BaseAddress, u8 Address, u8 *BufferPtr, unsigned ByteCount, u8 Option)
unsigned XIic_Send(UINTPTR BaseAddress, u8 Address, u8 *BufferPtr, unsigned ByteCount, u8 Option)
#define XIIC_REPEATED_START