libpynq  (release 5EID0-2023 version 0.3.0 of 2024-04-25 09:42 )
uart.c
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1 /*
2 Copyright (c) 2023 Eindhoven University of Technology
3 
4 Permission is hereby granted, free of charge, to any person obtaining a copy
5 of this software and associated documentation files (the "Software"), to deal
6 in the Software without restriction, including without limitation the rights
7 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 copies of the Software, and to permit persons to whom the Software is
9 furnished to do so, subject to the following conditions:
10 
11 The above copyright notice and this permission notice shall be included in all
12 copies or substantial portions of the Software.
13 
14 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 SOFTWARE.
21 */
22 #include "uart.h"
24 #include "log.h"
25 #include <platform.h>
26 #include <stdio.h>
27 
28 #define UART_REG_RECEIVE_FIFO 0
29 #define UART_REG_TRANSMIT_FIFO 1
30 #define UART_REG_STATUS 2
31 #define UART_REG_CONTROL 3
32 
33 #define UART_REG_STATUS_BIT_RX_FIFO_HAS_DATA 1
34 #define UART_REG_STATUS_BIT_RX_FIFO_FULL 2
35 #define UART_REG_STATUS_BIT_TX_FIFO_EMPTY 4
36 #define UART_REG_STATUS_BIT_TX_FIFO_FULL 8
37 
38 #define UART_REG_CONTROL_BIT_CLEAR_TX_FIFO 1
39 #define UART_REG_CONTROL_BIT_CLEAR_RX_FIFO 2
40 #define UART_REG_CONTROL_BIT_CLEAR_FIFOS \
41  (UART_REG_CONTROL_BIT_CLEAR_RX_FIFO | UART_REG_CONTROL_BIT_CLEAR_TX_FIFO)
42 
43 static arm_shared uart_handles[NUM_UARTS];
44 static volatile uint32_t *uart_ptrs[NUM_UARTS] = {
45  NULL,
46 };
47 
48 void uart_init(const int uart) {
49  if (!(uart >= UART0 && uart < NUM_UARTS)) {
50  pynq_error("invalid UART %d, must be 0..%d-1\n", uart, NUM_UARTS);
51  }
52  if (uart == UART0) {
53  uart_ptrs[uart] =
54  arm_shared_init(&(uart_handles[uart]), axi_uartlite_0, 4096);
55  } else if (uart == UART1) {
56  uart_ptrs[uart] =
57  arm_shared_init(&(uart_handles[uart]), axi_uartlite_1, 4096);
58  }
59 }
60 
61 void uart_destroy(const int uart) {
62  if (!(uart >= UART0 && uart < NUM_UARTS)) {
63  pynq_error("invalid UART %d, must be 0..%d-1\n", uart, NUM_UARTS);
64  }
65  if (uart_ptrs[uart] == NULL) {
66  pynq_error("UART%d has not been initialized.\n", uart);
67  }
68  arm_shared_close(&(uart_handles[uart]));
69  uart_ptrs[uart] = NULL;
70 }
71 
72 void uart_send(const int uart, const uint8_t data) {
73  if (!(uart >= UART0 && uart < NUM_UARTS)) {
74  pynq_error("invalid UART %d, must be 0..%d-1\n", uart, NUM_UARTS);
75  }
76  if (uart_ptrs[uart] == NULL) {
77  pynq_error("UART%d has not been initialized.\n", uart);
78  }
79  while ((uart_ptrs[uart][UART_REG_STATUS] &
81  ;
82  uart_ptrs[uart][UART_REG_TRANSMIT_FIFO] = data;
83 }
84 
85 uint8_t uart_recv(const int uart) {
86  if (!(uart >= UART0 && uart < NUM_UARTS)) {
87  pynq_error("invalid UART %d, must be 0..%d-1\n", uart, NUM_UARTS);
88  }
89  if (uart_ptrs[uart] == NULL) {
90  pynq_error("UART%d has not been initialized.\n", uart);
91  }
92  while ((uart_ptrs[uart][UART_REG_STATUS] &
94  }
95  return uart_ptrs[uart][UART_REG_RECEIVE_FIFO];
96 }
97 
98 bool uart_has_data(const int uart) {
99  if (!(uart >= UART0 && uart < NUM_UARTS)) {
100  pynq_error("invalid UART %d, must be 0..%d-1\n", uart, NUM_UARTS);
101  }
102  if (uart_ptrs[uart] == NULL) {
103  pynq_error("UART%d has not been initialized.\n", uart);
104  }
105  return ((uart_ptrs[uart][UART_REG_STATUS] &
108 }
109 
110 bool uart_has_space(const int uart) {
111  if (!(uart >= UART0 && uart < NUM_UARTS)) {
112  pynq_error("invalid UART %d, must be 0..%d-1\n", uart, NUM_UARTS);
113  }
114  if (uart_ptrs[uart] == NULL) {
115  pynq_error("UART%d has not been initialized.\n", uart);
116  }
117  return ((uart_ptrs[uart][UART_REG_STATUS] &
119 }
120 
121 void uart_reset_fifos(const int uart) {
122  if (!(uart >= UART0 && uart < NUM_UARTS)) {
123  pynq_error("invalid UART %d, must be 0..%d-1\n", uart, NUM_UARTS);
124  }
125  if (uart_ptrs[uart] == NULL) {
126  pynq_error("UART%d has not been initialized.\n", uart);
127  }
129 }
UART_REG_TRANSMIT_FIFO
#define UART_REG_TRANSMIT_FIFO
Definition: uart.c:29
uart_recv
uint8_t uart_recv(const int uart)
Receive a byte of data from the specified UART index by waiting for the receive FIFO to have data and...
Definition: uart.c:5
UART_REG_CONTROL_BIT_CLEAR_FIFOS
#define UART_REG_CONTROL_BIT_CLEAR_FIFOS
Definition: uart.c:40
pynq_error
#define pynq_error(...)
Definition: log.h:118
uart_init
void uart_init(const int uart)
Initialize the UART specified by the index with a shared memory handle and a buffer size of 4096 byte...
Definition: uart.c:2
arm_shared_memory_system.h
uart_has_space
bool uart_has_space(const int uart)
Check if the transmit FIFO for the specified UART index has space available.
Definition: uart.c:7
arm_shared_t
Definition: arm_shared_memory_system.h:39
UART1
@ UART1
Definition: uart.h:107
arm_shared_close
void arm_shared_close(arm_shared *handle)
Definition: arm_shared_memory_system.c:70
UART_REG_STATUS_BIT_TX_FIFO_FULL
#define UART_REG_STATUS_BIT_TX_FIFO_FULL
Definition: uart.c:36
UART_REG_STATUS_BIT_RX_FIFO_HAS_DATA
#define UART_REG_STATUS_BIT_RX_FIFO_HAS_DATA
Definition: uart.c:33
uart.h
NUM_UARTS
@ NUM_UARTS
Definition: uart.h:107
UART_REG_STATUS
#define UART_REG_STATUS
Definition: uart.c:30
uart_reset_fifos
void uart_reset_fifos(const int uart)
This function resets both the transmit and receive FIFOs of the UART specified by the uart parameter....
Definition: uart.c:8
uart_destroy
void uart_destroy(const int uart)
Close the shared memory handle for the specified UART index.
Definition: uart.c:3
log.h
arm_shared_init
void * arm_shared_init(arm_shared *handle, const uint32_t address, const uint32_t length)
Definition: arm_shared_memory_system.c:32
UART0
@ UART0
Definition: uart.h:107
UART_REG_RECEIVE_FIFO
#define UART_REG_RECEIVE_FIFO
Definition: uart.c:28
uart_send
void uart_send(const int uart, const uint8_t data)
Send a byte of data on the specified UART index by waiting for the transmit FIFO to have space and th...
Definition: uart.c:4
uart_has_data
bool uart_has_data(const int uart)
Check if the receive FIFO for the specified UART index has data available.
Definition: uart.c:6
UART_REG_CONTROL
#define UART_REG_CONTROL
Definition: uart.c:31